Technical reports in Computer and Information Science

High power densities in current SoCs result in both huge energy consumption and increased chip temperature. This paper proposes a temperature-aware dynamic voltage selection technique for energy minimization and presents a thorough analysis of the parameters that influence the potential gains that can be expected from such a technique, compared to a voltage selection approach that ignores temperature. In addition to demonstrating the actual percentages of energy that can be saved by being temperature aware, we explore some significant issues in this context, such as the relevance of taking into consideration transient temperature effects at optimization, the impact of the percentage of leakage power relative to the total power consumed and of the degree to which leakage depends on tem-